I loaded their example Verilog and tried to download it. Oh. The software doesn’t download to the FPGA. That’s another piece of software you have to get from their web site. Does it support Linux?
But it has the message hard coded into the Verilog which means you need to rebuild the FPGA every time you want to change it. Adding a UART will allow us to update that message. The good news is ...
A discussion of programming techniques in Verilog, including gate level modeling, model instantiation, dataflow modeling, and behavioral modeling A treatment of programmable and reconfigurable devices ...
unfortunately there is no a Verilog model nor sample code for this device. There is an IBIS model available for the device in the Design and Development Tab of the product folder.